exception 14 and Install_Interrupt_Handler

[Tom Brubaker]

[CPU ] exception(): 3rd (14) exception with no resolution

And yet a Print statement from the top of the function I have Installed for
interrupt 14 does NOT print, does this mean the interrupt handler was not
installed properly after all? Am I correct in associating the 14 in the
bochs error with interrupt 14 for page faults, or is there really no
connection there?

Thanks

-Tom-

[Julio]

I've been getting the same error. I tracked it to the Enable_Paging
function. The exception occurs when the cr0 register is updated to enable
paging, the processor doesn't even make it to the next line of assembly. It
occurs no matter what I do in paging.c whenever I call Enable_Paging.
According to the comments in lowlevel.asm it should be updating cr2 and when
I do that instead it doesn't crash; however, this seems to be wrong based on
the Intel document. I don't know what else to try, but I hope it helps
someone.

Julio

[Tom Brubaker]

Post by Julio
I do that instead it doesn't crash

Do you actually make it to the shell? The project description
mentioned a function for testing whether paging is actually
enabled or not (see under grading criteria). Did you try that?
Does it look like paging is actually on when you update cr2
instead of cr0?

-Tom-

[Julio Espinoza-Sokal]

Right now it would just make it to another TODO macro, I didn't explore it
much further because it seemed clear that cr0 is the right register not cr2,
but perhaps it's worth exploring further.

Julio

Post by Tom Brubaker

Post by Julio
I do that instead it doesn't crash

Do you actually make it to the shell? The project description
mentioned a function for testing whether paging is actually
enabled or not (see under grading criteria). Did you try that?
Does it look like paging is actually on when you update cr2
instead of cr0?
-Tom-

[William Francis Cladek]

Did either of you guys figure out what this error was about? I'm getting
the
same thing and have traced it to Enable_Paging, and changing the cr0's to
cr2 seems to get rid of it. Though the Intel doc does indicate it should
be cr0, so I'm guessing cr2 in the comment is a typo.

The odd thing is that this seems to be related to the global bit of the
page table entries. I initially thought they had to be set to 1, and I
got a bogus memory error. So when I change it to 0, I get this other
error about this mysterious "exception with no resolution".

Will

Post by Julio Espinoza-Sokal
Right now it would just make it to another TODO macro, I didn't explore it
much further because it seemed clear that cr0 is the right register not cr2,
but perhaps it's worth exploring further.
Julio

Post by Tom Brubaker

Post by Julio
I do that instead it doesn't crash

Do you actually make it to the shell? The project description
mentioned a function for testing whether paging is actually
enabled or not (see under grading criteria). Did you try that?
Does it look like paging is actually on when you update cr2
instead of cr0?
-Tom-

[Tom Brubaker]

changing the cr0's to cr2 seems to get rid of it.
...
Though the Intel doc does indicate it should be cr0

Yeah, pages 2-12 and 2-13 of the Intel spec are pretty clear about the cr
Control Registers. I think the cr0 is correct as originally coded in
lowlevel.asm. When you change it to use cr2 instead, there is no error
because the cpu never even tries to enable paging.

The odd thing is that this seems to be related to the global bit of the
page table entrie

It looks like the global bit doesn't do anything before the pentium pro. I
think it just wants it to be zero.

Did either of you guys figure out what this error was about?

Nope. I guess this 'good-faith' effort will have to do until discussion
this week. Also, I am assuming the (14) in the error message is NOT related
to the interrupt 14 that we are supposed to be handling after all.

:-\

-Tom-

[Iulian Neamtiu]

The exception 14 is a page fault. Are you sure you install the page fault
handler, i.e.

Install_Interrupt_Handler(14, &Page_Fault_Handler);

before you call Enable_Paging() ?

The code in lowlevel.asm is correct (the comment about cr2 is just a typo)
and you shouldn't change lowlevel.asm at all. I'm pretty sure you get the
page fault because the kernel mapping is not set up right.

Iulian

Post by Tom Brubaker

changing the cr0's to cr2 seems to get rid of it.
...
Though the Intel doc does indicate it should be cr0

Yeah, pages 2-12 and 2-13 of the Intel spec are pretty clear about the cr
Control Registers. I think the cr0 is correct as originally coded in
lowlevel.asm. When you change it to use cr2 instead, there is no error
because the cpu never even tries to enable paging.

The odd thing is that this seems to be related to the global bit of the
page table entrie

It looks like the global bit doesn't do anything before the pentium pro. I
think it just wants it to be zero.

Did either of you guys figure out what this error was about?

Nope. I guess this 'good-faith' effort will have to do until discussion
this week. Also, I am assuming the (14) in the error message is NOT related
to the interrupt 14 that we are supposed to be handling after all.
:-\
-Tom-

[William Francis Cladek]

I originally tried it with installing the interrup handler after, as the
descriptions seems to indicate, but installing it before doesn't help
either. In fact, as I think Julio noted, almost nothing you do in
paging.c seems to help (aside from messing with those global flags, oddly
enough). For instance, if I make the entire body of
Init_VM consist of:

Install_Interrupt_Handler(14,&Page_Fault_Handler);
Enable_Paging(Alloc_Page());

which just sends a random pointer to Enable_Paging, I still get that error
somewhere in Enable_Paging, which it never exits.

Post by Iulian Neamtiu
The exception 14 is a page fault. Are you sure you install the page fault
handler, i.e.
Install_Interrupt_Handler(14, &Page_Fault_Handler);
before you call Enable_Paging() ?
The code in lowlevel.asm is correct (the comment about cr2 is just a typo)
and you shouldn't change lowlevel.asm at all. I'm pretty sure you get the
page fault because the kernel mapping is not set up right.
Iulian

Post by Tom Brubaker

changing the cr0's to cr2 seems to get rid of it.
...
Though the Intel doc does indicate it should be cr0

Yeah, pages 2-12 and 2-13 of the Intel spec are pretty clear about the cr
Control Registers. I think the cr0 is correct as originally coded in
lowlevel.asm. When you change it to use cr2 instead, there is no error
because the cpu never even tries to enable paging.

The odd thing is that this seems to be related to the global bit of the
page table entrie

It looks like the global bit doesn't do anything before the pentium pro. I
think it just wants it to be zero.

Did either of you guys figure out what this error was about?

Nope. I guess this 'good-faith' effort will have to do until discussion
this week. Also, I am assuming the (14) in the error message is NOT related
to the interrupt 14 that we are supposed to be handling after all.
:-\
-Tom-

[William Francis Cladek]

Scratch that. I figured out the problem was, in fact, that I was setting
up the kernel mapping incorrectly like Iulian said. It seems to work now
(in terms of the intermediate submission, anyway), cr0's and all. Not
sure why doing *nothing* still caused there error, but if you're seeing
it, that's why.

Will

[Drew Chen]

the 3rd (14) exception with no resolution is happening (obviously) because you
dont setup your page dir/tables correctly.

what it really means is that there have been 3 sucessive exceptions happening
which makes the system unrecoverable.
if you turn on the excessive bochs debug line in .bochsrc you'll see you get a 14
exception (because the dir/tables arent setup properly which makes the cpu think
the page is not in memory, hence page fault), but then since paging is enabled,
the memory addresses that the page tables do hold are incorrect thus you get
another exception 8, double fault, meaning two successive exceptions happen, and
then another exception which makes the system unrecoverable.

-drew